This pass does misc. More...

#include "AMDGPU.h"
#include "AMDGPUMemoryUtils.h"
#include "AMDGPUTargetMachine.h"
#include "SIModeRegisterDefaults.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/Analysis/AssumptionCache.h"
#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/Analysis/TargetLibraryInfo.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/Analysis/UniformityAnalysis.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/Dominators.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/IR/InstVisitor.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/PatternMatch.h"
#include "llvm/IR/ValueHandle.h"
#include "llvm/InitializePasses.h"
#include "llvm/Pass.h"
#include "llvm/Support/KnownBits.h"
#include "llvm/Support/KnownFPClass.h"
#include "llvm/Transforms/Utils/BasicBlockUtils.h"
#include "llvm/Transforms/Utils/IntegerDivision.h"
#include "llvm/Transforms/Utils/Local.h"

Classes
class	VectorSlice
	Helper class for "break large PHIs" (visitPHINode). More...

Macros
#define	DEBUG_TYPE "amdgpu-codegenprepare"

Functions
static void	extractValues (IRBuilder<> &Builder, SmallVectorImpl< Value * > &Values, Value *V)
static Value *	insertValues (IRBuilder<> &Builder, Type Ty, SmallVectorImpl< Value > &Values)
static SelectInst *	findSelectThroughCast (Value V, CastInst &Cast)
static Value *	emitRsqIEEE1ULP (IRBuilder<> &Builder, Value *Src, bool IsNegative)
	Emit an expansion of 1.0 / sqrt(Src) good for 1ulp that supports denormals.
static std::pair< Value , Value >	getMul64 (IRBuilder<> &Builder, Value LHS, Value RHS)
static Value *	getMulHu (IRBuilder<> &Builder, Value LHS, Value RHS)
static Value *	getSign32 (Value *V, IRBuilder<> &Builder, const DataLayout DL)
static bool	areInSameBB (const Value A, const Value B)
static bool	isInterestingPHIIncomingValue (const Value *V)
static void	collectPHINodes (const PHINode &I, SmallPtrSet< const PHINode *, 8 > &SeenPHIs)
static bool	isPtrKnownNeverNull (const Value *V, const DataLayout &DL, const AMDGPUTargetMachine &TM, unsigned AS)
	INITIALIZE_PASS_BEGIN (AMDGPUCodeGenPrepare, DEBUG_TYPE, "AMDGPU IR optimizations", false, false) INITIALIZE_PASS_END(AMDGPUCodeGenPrepare
static bool	isV4I8 (Type *Ty)
	Check if type is <4 x i8>.
static bool	matchDot4Pattern (Value MulOp, Value &A, Value *&B, bool IsSigned)
	Helper to match the dot4 pattern: mul(zext/sext <4 x i8>, zext/sext <4 x i8>) Returns true if pattern matches and signedness matches IsSigned.

Variables
	DEBUG_TYPE
AMDGPU IR	optimizations
AMDGPU IR	false

Detailed Description

This pass does misc.

AMDGPU optimizations on IR before instruction selection.

Definition in file AMDGPUCodeGenPrepare.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE "amdgpu-codegenprepare"

Definition at line 41 of file AMDGPUCodeGenPrepare.cpp.

Function Documentation

◆ areInSameBB()

bool areInSameBB	(	const Value *	A,
		const Value *	B )

static

Definition at line 1697 of file AMDGPUCodeGenPrepare.cpp.

References A(), B(), and llvm::dyn_cast().

Referenced by isInterestingPHIIncomingValue().

◆ collectPHINodes()

void collectPHINodes	(	const PHINode &	I,
		SmallPtrSet< const PHINode *, 8 > &	SeenPHIs )

static

Definition at line 1760 of file AMDGPUCodeGenPrepare.cpp.

References collectPHINodes(), llvm::dyn_cast(), I, and llvm::SmallPtrSetImpl< PtrType >::insert().

Referenced by collectPHINodes().

◆ emitRsqIEEE1ULP()

Value * emitRsqIEEE1ULP	(	IRBuilder<> &	Builder,
		Value *	Src,
		bool	IsNegative )

static

Emit an expansion of 1.0 / sqrt(Src) good for 1ulp that supports denormals.

Definition at line 601 of file AMDGPUCodeGenPrepare.cpp.

References llvm::APFloat::getSmallestNormalized().

◆ extractValues()

void extractValues	(	IRBuilder<> &	Builder,
		SmallVectorImpl< Value * > &	Values,
		Value *	V )

static

Definition at line 340 of file AMDGPUCodeGenPrepare.cpp.

References llvm::dyn_cast(), E(), I, and llvm::SmallVectorTemplateBase< T, bool >::push_back().

◆ findSelectThroughCast()

SelectInst * findSelectThroughCast	(	Value *	V,
		CastInst *&	Cast )

static

Definition at line 432 of file AMDGPUCodeGenPrepare.cpp.

References llvm::dyn_cast(), and llvm::User::getOperand().

◆ getMul64()

std::pair< Value , Value > getMul64	(	IRBuilder<> &	Builder,
		Value *	LHS,
		Value *	RHS )

static

Definition at line 1002 of file AMDGPUCodeGenPrepare.cpp.

References llvm::Type::getInt32Ty(), llvm::Type::getInt64Ty(), llvm::Hi, LHS, llvm::Lo, and RHS.

Referenced by getMulHu().

◆ getMulHu()

Value * getMulHu	(	IRBuilder<> &	Builder,
		Value *	LHS,
		Value *	RHS )

static

Definition at line 1016 of file AMDGPUCodeGenPrepare.cpp.

References getMul64(), LHS, and RHS.

◆ getSign32()

Value * getSign32	(	Value *	V,
		IRBuilder<> &	Builder,
		const DataLayout	DL )

static

Definition at line 1225 of file AMDGPUCodeGenPrepare.cpp.

References llvm::computeKnownBits(), DL, llvm::Constant::getAllOnesValue(), llvm::Constant::getNullValue(), llvm::KnownBits::isNegative(), and llvm::KnownBits::isNonNegative().

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN	(	AMDGPUCodeGenPrepare	,
		DEBUG_TYPE	,
		"AMDGPU IR optimizations"	,
		false	,
		false	)

References DEBUG_TYPE, and INITIALIZE_PASS_DEPENDENCY.

◆ insertValues()

Value * insertValues	(	IRBuilder<> &	Builder,
		Type *	Ty,
		SmallVectorImpl< Value * > &	Values )

static

Definition at line 352 of file AMDGPUCodeGenPrepare.cpp.

References assert(), E(), llvm::PoisonValue::get(), I, and llvm::SmallVectorTemplateCommon< T, typename >::size().

◆ isInterestingPHIIncomingValue()

bool isInterestingPHIIncomingValue ( const Value * V )

static

Definition at line 1705 of file AMDGPUCodeGenPrepare.cpp.

References llvm::BitVector::all(), areInSameBB(), llvm::dyn_cast(), llvm::isa(), and llvm::BitVector::set().

◆ isPtrKnownNeverNull()

bool isPtrKnownNeverNull	(	const Value *	V,
		const DataLayout &	DL,
		const AMDGPUTargetMachine &	TM,
		unsigned	AS )

static

Parameters

V	Value to check
DL	DataLayout
TM	TargetMachine (TODO: remove once DL contains nullptr values)
AS	Target Address Space

Returns: true if V cannot be the null value of AS, false otherwise.

Definition at line 1990 of file AMDGPUCodeGenPrepare.cpp.

References assert(), llvm::cast(), llvm::computeKnownBits(), DL, llvm::dyn_cast(), llvm::AMDGPU::getNullPointerValue(), and llvm::isa().

◆ isV4I8()

bool isV4I8 ( Type * Ty )

static

Check if type is <4 x i8>.

Definition at line 2430 of file AMDGPUCodeGenPrepare.cpp.

References llvm::dyn_cast(), llvm::VectorType::getElementType(), llvm::FixedVectorType::getNumElements(), and llvm::Type::isIntegerTy().

Referenced by matchDot4Pattern().

◆ matchDot4Pattern()

bool matchDot4Pattern	(	Value *	MulOp,
		Value *&	A,
		Value *&	B,
		bool	IsSigned )

static

Helper to match the dot4 pattern: mul(zext/sext <4 x i8>, zext/sext <4 x i8>) Returns true if pattern matches and signedness matches IsSigned.

Sets A, B to the <4 x i8> sources.

Definition at line 2439 of file AMDGPUCodeGenPrepare.cpp.

References A(), B(), llvm::dyn_cast(), llvm::VectorType::getElementType(), llvm::FixedVectorType::getNumElements(), llvm::Value::getType(), llvm::Type::isIntegerTy(), isV4I8(), llvm::PatternMatch::m_Mul(), llvm::PatternMatch::m_SExt(), llvm::PatternMatch::m_Value(), llvm::PatternMatch::m_ZExt(), and llvm::PatternMatch::match().

Variable Documentation

◆ DEBUG_TYPE

DEBUG_TYPE

Definition at line 2322 of file AMDGPUCodeGenPrepare.cpp.

◆ false

AMDGPU IR false

Definition at line 2323 of file AMDGPUCodeGenPrepare.cpp.

◆ optimizations

AMDGPU IR optimizations

Definition at line 2322 of file AMDGPUCodeGenPrepare.cpp.

Classes

Macros

Functions

Variables

Detailed Description

Macro Definition Documentation

◆ DEBUG_TYPE

Function Documentation

◆ areInSameBB()

◆ collectPHINodes()

◆ emitRsqIEEE1ULP()

◆ extractValues()

◆ findSelectThroughCast()

◆ getMul64()

◆ getMulHu()

◆ getSign32()

◆ INITIALIZE_PASS_BEGIN()

◆ insertValues()

◆ isInterestingPHIIncomingValue()

◆ isPtrKnownNeverNull()

◆ isV4I8()

◆ matchDot4Pattern()

Variable Documentation

◆ DEBUG_TYPE

◆ false

◆ optimizations